An Ultrafast Active Quenching Active Reset Circuit with 50% SPAD Afterpulsing Reduction in a 28 nm FD-SOI CMOS Technology Using Body Biasing Technique.

An ultrafast Active Quenching-Active Reset (AQAR) circuit is presented for the afterpulsing reduction in a Single Photon Avalanche Diode (SPAD). The proposed circuit is designed in a 28 nm Fully Depleted Silicon On Insulator (FD-SOI) CMOS technology. By exploiting the body biasing technique, the avalanche is detected very quickly and, consequently, is quenched very fast. The fast quenching decreases the avalanche charges, therefore resulting in the afterpulsing reduction. Both post-layout and experimental results are presented and are highly in accordance with each other. It is shown that the proposed AQAR circuit is able to detect the avalanche in less than 40 ps and reduce the avalanche charge and the afterpulsing up to 50%.

Design and Characterization of an Asynchronous Fixed Priority Tree Arbiter for SPAD Array Readout.

The usage of single-photon avalanche diode arrays is becoming increasingly common in various domains such as medical imaging, automotive vision systems, and optical communications. Nowadays, thanks to the development of microelectronics technologies, the SPAD arrays designed for these applications has been drastically well-facilitated, allowing for the manufacturing of large matrices. However, there are growing challenges for the design of readout circuits with the needs of reducing their energy consumption (linked to the usage cost) and data rate. Indeed, the design of the readout circuit for the SPAD array is generally based on synchronous logic; the latter requires synchronization that may increase the dead time of the SPADs and clock trees management that are known to increase power consumption. With these limitations, the long-neglected asynchronous (clockless) logic proved to be a better alternative because of its ability to operate without a clock. In this paper, we presented the design of a 16-to-1 fixed-priority tree arbiter readout circuit for a SPAD array based on asynchronous logic principles. The design of this circuit was explained in detail and supported by simulation results. The manufactured chip was tested, and the experimental results showed that it is possible to record up to 333 million events per second; no reading errors were detected during the data extraction test.

Efficient Modeling and Simulation of Space-Dependent Biological Systems.

We recently demonstrated the possibility to model and to simulate biological functions using hardware description languages (HDLs) and associated simulators traditionally used for microelectronics. Nevertheless, those languages are not suitable to model and simulate space-dependent systems described by partial differential equations. However, in more and more applications space- and time-dependent models are unavoidable. For this purpose, we investigated a new modeling approach to simulate molecular diffusion on a mesoscopic scale still based on HDL. Our work relies on previous investigations on an electrothermal simulation tool for integrated circuits, and analogies that can be drawn between electronics, thermodynamics, and biology. The tool is composed of four main parts: a simple but efficient mesher that divides space into parallelepipeds (or rectangles in 2D) of adaptable size, a set of interconnected biological models, a SPICE simulator that handles the model and Python scripts that interface the different tools. Simulation results obtained with our tool have been validated on simple cases for which an analytical solution exists and compared with experimental data gathered from literature. Compared with existing approaches, our simulator has three main advantages: a very simple algorithm providing a direct interface between the diffusion model and biological model of each cell, the use of a powerful and widely proven simulation core (SPICE) and the ability to interface biological models with other domains of physics, enabling the study of transdisciplinary systems.